[klibc] [PATCH] mips/mips64: Get rid of delay slot hacks
ben at decadent.org.uk
Sun Aug 28 13:43:23 PDT 2022
On Sat, 2022-08-13 at 17:45 +0100, Jiaxun Yang wrote:
> There are some MIPS assembly code trying to take advantage of
> delay slots. However nowadays MIPS Release 6 removed delay slots
> so they become an ordering problem.
It didn't remove delay slots. It added "compact" branch instructions
that don't have them, but after this patch the new instructions still
> Moreover, nowadays assmbler are smart enough to fill delay slots
> properly. All those hacks can actually be archived by binutils.
I can see that it does move instructions into the delay slot for a "j"
instruction. However, in this case:
> --- a/usr/klibc/arch/mips/syscall.S
> +++ b/usr/klibc/arch/mips/syscall.S
> @@ -1,14 +1,10 @@
> #include <machine/asm.h>
> #include <asm/unistd.h>
> - .set noreorder
> beqz a3, 1f
> - # sw is actually two instructions; the first one goes
> - # in the branch delay slot
> - # XXX: Break this up manually; as it is now it generates warnings.
> sw v0, errno
> li v0, -1
> 1: jr ra
the delay slot gets filled with a nop. I don't think that matters
much, but this means the commit message is not really accurate.
I think I would be happy to accept this as cleanup if you correct the
It is a miracle that curiosity survives formal education.
- Albert Einstein
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