[Lancelot] VGA clk

Tommy Thorn tommy at numba-tu.com
Wed Feb 23 00:35:09 PST 2005

H. Peter Anvin wrote:
> Wei Mark Fang wrote:
>> I tried using 25Mhz for the FSM that generates the
>> timing signals, and set the clk of the DAC at 50Mhz
>> (same as SDRAM). The result is not good. I programmed
>> it to display 2 columns of different colors. However,
>> it showed zig-zags of the 2 colors, all misaligned.
>> I thought about the fact that the DAC is at twice the
>> freq as the timing FSM. Doesn't each line appear
>> stretched out? I mean the DAC is clocking each pixel
>> twice, so the scanner will refresh 2 pixels with the
>> same value. How must the timing FSM be adjusted to
>> account for that? I am quite unsure, as I don't have a
>> very good grasp of how VGA monitors work.
> It should shift the picture over by 4 pixels.

It should, but I tried it on my design and frankly I couldn't tell the 

What Wei might be missing here is that for most parts the video DAC can 
be thought of as an asynchronous D/A converter with a minuscule phase 
shift.  As long as the DAC sampling lines up with the changes of the 
input (ie., the DAC clock is a multiple of the pixel clock), the 
frequency of the DAC just determines the phase shift A.K.A. latency.

All that said, Lancelot still holds mysteries to me.  The blanking 
facility of the DAC didn't work for me; I just got a purple (?) frame 
around the screen.  I could only get color space configuration 0 to work 
usefully.  Finally, pardon me for not checking the schematics, but are 
only the RGB values delayed by 8 cycles?  If all signal through the DAC 
see this delay then that would explain why I could see a difference.


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